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Instruction set
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#	Item
141	PDF Document Add to Reading List Source URL: www.ieee-security.org Language: English - Date: 2015-05-11 16:42:58 Memory management Instruction set architectures Memory protection Capability-based security Kernel Memory management unit MIPS instruction set Protection ring Microkernel EROS Virtual memory 64-bit computing
142	Efficient SIMD Code Generation for Runtime Alignment and Length Conversion Peng Wu Alexandre E. Eichenberger Add to Reading List Source URL: researcher.watson.ibm.com Language: English - Date: 2009-10-23 16:02:22 Computer architecture Assembly languages Parallel computing Instruction set architectures Pointer Data structure alignment SIMD Offset Addressing mode DEC Alpha
143	T9000 - superscalar transputer Richard Forsyth Bob Krysiak Roger Shepherd INrvl0S Limited - SGS-Thomson Microelectronics Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:44:50 Central processing unit Stack machines Microprocessors Parallel computing Transputer Computer architecture Processor register CPU cache IDL Instruction set
144	Advanced Parallel Architecture Annalisa Massini Vector architecture 2 Add to Reading List Source URL: twiki.di.uniroma1.it Language: English - Date: 2015-04-28 17:33:30 Central processing unit Parallel computing Computer architecture Supercomputers Instruction set architectures Processor register Cray-1 MIPS instruction set SIMD Instruction set 64-bit computing Euclidean vector
145	Crackstation Optimised Cryptography On The PlayStation 3 Presented By Nick Breese © 2007 Security-Assessment.com Add to Reading List Source URL: www.security-assessment.com Language: English - Date: 2008-04-11 15:32:18 Instruction set architectures Linux Power Architecture OtherOS PlayStation 3 Cell PlayStation PowerPC Yellow Dog Linux Hypervisor Fedora
146	KVM for IBM z Systems Steffen Thoss z Systems Linux and Virtualization Product Manager Agenda Add to Reading List Source URL: www.susecon.com Language: English - Date: 2015-11-20 12:02:19 IBM zEnterprise System IBM z13 IBM System z Instruction set architectures Linux on z Systems IBM zEC12 Mainframe computer Z/Architecture 45 nanometer
147	Capability Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture Add to Reading List Source URL: www.cl.cam.ac.uk Language: English - Date: 2015-12-01 06:21:41 Instruction set architectures Central processing unit Computer architecture Memory management Memory protection Capability-based security Pointer MIPS instruction set 64-bit computing Instruction set Reduced instruction set computing Kernel
148	LAWRENCE COUNTY ROAD MAP February 18, 2009 K SID E LO O Add to Reading List Source URL: www.lawrence.sd.us Language: English - Date: 2009-02-18 18:07:17 Atmel AVR instruction set Microcontrollers English orthography
149	Virtual Machine Showdown: Stack Versus Registers Yunhe Shi, David Gregg, Andrew Beatty M. Anton Ertl Department of Computer Science Add to Reading List Source URL: www.usenix.org Language: English - Date: 2005-08-02 11:12:30 Central processing unit Assembly languages Java virtual machine Android Programming language implementation Stack machine Java bytecode Dalvik Instruction set Processor register Stack Opcode
150	PDF Document Add to Reading List Source URL: trca.on.ca Language: English - Date: 2010-06-07 10:31:39 English orthography Atmel AVR instruction set

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